Voltage Controlled Looping Envelope Generator (LOOPENV 1)

This chip is a development of my earlier VCADSR envelope generator. Whilst that chip had both GATE and TRIGGER inputs, this chip replaces the TRIGGER input with a MODE CV that allows selection of normal ADSR, Gated looping, or full LFO-style Looping modes.

The LOOPENV chip keeps the other features of the original VCADSR, like the LEVEL CV which controls the output level and can act as an 'envelope depth' control, and the TIME CV which shortens the overall time of the whole envelope. The TIME CV makes an excellent modulation input for either envelope modulation or LFO frequency modulation.

Full details are in the datasheet below, but the envelope times range from 1mS through to 10Secs, in 4 even decades, and all control voltages run from 0-5V.

There is also a digital input which selects either a 'traditional' exponential envelope shape, or a early-digital-era linear envelope.

Pinout Diagram

More details

• Voltage-controlled envelope generator PIC 16F684 ASM code
• Assembled HEX code from above file
• Circuit Diagram
• LOOPENV datasheet (includes circuit diagram and chip pinout)

Looping Envelope elsewhere on the web

Rick Holt of Frequency Central has developed a DIY PCB for this project over at Muffwiggler.com.